TRANSFERS & SORTERS WAFER ALIGNERS VACUUM WANDS WAFER PICKS METAL CASSETTES MASK PICKS OPENERS PRESENTERS TRANSPORT BAGS MOCK WAFERS | |||||||||||
Automatic flat Aligner |
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WHS-A1 Wafer Size:3" 4" 6" 8" |
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-Type:Automatic Material |
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Antistatic Construction With Wafer and Cassette Ground Paths Quick Disconnect Roller for Easy Cleaning +/- 1¡Æ Primary Flat Alignment Accuracy Applications: Alignment, Lot integrity and Edge inspection |
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Alignment - Wafer flat and notch aligners are used in the semiconductor industry to ensure that wafers are oriented correctly during various processes, such as lithography, deposition, and etching. The flat aligner has a notch or flat that corresponds to the orientation of the wafer's crystal lattice structure. This is critical because the orientation of the wafer affects the performance and functionality of the final semiconductor device |
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Lot integrity - Aligners are also used in the semiconductor industry to aid operators in performing lot integrity checks. By rotating the wafer scribe, which is the identification marking on the wafer's edge, to be visible to the operator, the operator can verify that the correct lot of wafers is being loaded into a production tool. This is an important step in preventing errors and ensuring consistent product quality. | |||||||||||
Edge inspection - Wafer flat and notch aligners are also used in the semiconductor industry to inspect wafers for edge defects. This macro inspection procedure is usually done under a light source and involves examining the edges of the wafer for any chips, cracks, or other imperfections. This is an important step in preventing wafer breakage during subsequent processing steps, as edge defects can weaken the wafer and cause it to break or fail. By using wafer flat and notch aligners to identify and inspect these defects, operators can take steps to prevent further processing of defective wafers and avoid costly production delays | |||||||||||
Advanced technology automatic wafer flat aligner for alignment 76 mm up to 150 mm wafers. Engineered for InP, GaAs, GaN and SiC compound wafer handling. Features motorized stage for gentle lifting of compound wafers - protecting the wafer edge and increasing yields; touchscreen recipe software for standard alignment, thin wafer/compound wafer alignment and edge inspection recipes. ISO Class 3. | |||||||||||
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